1. Field of the Invention
The present invention relates to a packaging structure with circuits directly connected to a semiconductor chip, and, more particularly, to a packaging structure with circuits directly connected to a semiconductor chip that has both characteristics of ceramic rigidity and metal tenacity and can be used to reduce substrate warpage resulting from asymmetrical built-up structures.
2. Description of Related Art
Customer demands of the electronics industry continue to evolve rapidly and the main trends are high integration and miniaturization. In order to satisfy those requirements, especially in the packaging of semiconductor devices, development of circuit boards with the maximum of active and passive components and conductive wires has progressed from single to multiple layer types. This means that a greater usable area is available due to interlayer connection technology.
First, semiconductor chip carrier boards suitable for semiconductor devices, such as substrates or conductive wire frames, are manufactured through a common semiconductor chip carrier manufacturer. Then, the semiconductor chip carrier is processed by semiconductor chip attachment, wire bonding, molding, implanting solder balls etc. for assembling semiconductor devices. Finally, the semiconductor devices having electronic functions required by clients are completed. Because the steps of the practical manufacture are minute and complex, interfaces are not integrated easily at the time when manufactured by different fabricating proprietors. Further, if the client wants to change the function design, efficiency and economic benefit will suffer complexity of integration and modification.
In the conventional semiconductor device, semiconductor chips are 10 mounted on top of a substrate, and then processed in wire bonding, or connecting the semiconductor chip which has the solder bump thereon to the conductive pads on the substrate, followed by placing solder balls on the back of the substrate to provide electrical connections for printed circuit boards. Although an objective of high quantity pin counts is achieved, this condition is limited by way of long pathways of conductive lines making electric characteristics unable to be improved in the more frequent and high-speed operating situations. Otherwise, the complexity of the manufacture is only relatively increased because too many connective interfaces are required for conventional packages.
In many studies, semiconductor chips directly conducting to external electronic devices are embedded into a package substrate to shorten conductive pathways, decrease signal loss and distortion, and accelerate operations.
In a carrier structure embedded with a semiconductor chip, as shown in FIG. 1, a metal layer is formed on each of electrode pads on an active surface of the semiconductor chip for preventing destruction of the semiconductor chip in a carrier by laser ablation. The carrier structure embedded with a semiconductor chip includes: a carrier board 11, on which a cavity is formed; a semiconductor chip 12 which is placed in the cavity, and has plural electrode pads 13 formed on an active surface thereof a protective layer 14 formed on the carrier board 11 embedded with the semiconductor chip 12, and accordingly revealing the plural electrode pads 13; plural metal plates 15 formed on surfaces of the electrode pads 13; and a built-up structure 16 formed on surfaces of the semiconductor chip 12 and the carrier board 11. The built-up structure 16 is formed on the surfaces of the semiconductor chip 12 and the carrier board 11, and conducts the carrier board 11 to the electrode pads 13 of the semiconductor chip 12.
Because the built-up structure is formed on only one side of the aforementioned packaging structure, both the conductive path and width of the packaging structure are smaller than that in conventional BGA packaging substrates. However, uneven stress occurs between the surfaces with or without the built-up structure so that the carrier board suffers warpage due to the asymmetrical built-up structure thereon. The above-illustrated results in production being difficult, yield decrease resulting from the packaging structure being excessively warped, reliability decrease, and so forth. Hence, carrier boards made of a single material are not satisfactory to overcome the shortcomings mentioned above.